Setup Time & Skew violation warning messages (STA) for a SPI based PSoC Creator project | Cypress

Support & Community

Setup Time & Skew violation warning messages (STA) for a SPI based PSoC Creator project

Last Updated: June 23, 2011
Answer: 

Question: I'm getting around 33 warning messages when I compile a SPI based project in PSoC Creator. How to resolve them?

Response:

Following are the format of warning messages you might be getting:

sta.M0012: Setup time violation from clock "clock1" at "register1" to clock "clock2" at "register2".

sta.M0010: The skew from clock "clock1" at "register1" to clock "clock2" at "register2" is "time1" ns. The skew is too large for a clock with period "time2 (< time1)" ns.

Please check whether you have uncheked the "Clock Synchronization" for SPIM & SPIS input pins. You might see these warning messages because of this.

  

This uncheking has to be done for all the input pins - MISO (SPIM) & MOSI, SCLK, SS (SPIS)

Note: If you getting any STA warning message related to asynchronous nature, Please refer to this KB.

Provide feedback on this article

To protect your privacy, do not include contact information in your feedback.

Browse KB By Product

Browse KB by Type