Sampling Frequency of Dual ADC | Cypress Semiconductor
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Sampling Frequency of Dual ADC
Question: How to adjust the sampling frequency of a Dual ADC?
Response: In order to get the exact sampling frequency, data clock and the calc time needs to be adjusted. For example,
CPU Frequency = 24MHz
Required Sample Rate = 3200SPS
Resolution = 8 bits
Data Clock = Sample Rate * (2^(No.Of Bits +2) + Calc Time)
Assuming Calc Time of 0
Data Clock = 3200 * 2^10 = 3.2768MHz
Selecting SysClk*2 as VC3 source, the nearest divider is 14. The resultant Data clock is 3.4285MHz.
Now calculate minimum Calc time
Calc Time = Data Clock * 260 / CPU Clock
Calc Time = 3.4285MHz * 260 / 24MHz = 37
Now by adjusting the Calc Time parameter exact sampling frequency can be obtained.
Sampling Frequency = Data Clock / (2^10 + Calc Time)
If the Calc Time as 47, then the sampling frequency is 3201.2 SPS.