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Restrictions/Limitations on using FX2LP IFCLK | Cypress Semiconductor

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Restrictions/Limitations on using FX2LP IFCLK

Last Updated: June 12, 2011

Are there any concerns/restrictions/limitations on using IFCLK?


IFCLK input must lie with in the 5MHz - 48 MHz range. 

For applications that are using an external IFCLK source, it is  important the IFCLK be free-running. Note that the IFCLK (being spec'ed fo r a minimum of 5 MHz) cannot be shut down at all. The reason being is the logic needs to be alive enough to keep up communications with the SIE to know when to update packet pointers. There absolutely can?t be any stoppages in the clock. It also means that the external IFCLK source must be present before the FX2LP firmware (8051) configures the IFCONFIG register. The FX2 comes up with the internal IFCLK source selected, so power-on configuration is not an issue.

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