Reduction in the Active Power Consumption of FX2LP18 | Cypress Semiconductor
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Reduction in the Active Power Consumption of FX2LP18
How to reduce the active power consumption of FX2LP18?
1) changing the CPUCS register bits 4 and 3 to reduce the clock speed to 12 MHz or 24 MHz
2) changing IFCONFIG.6 to 0 to set the interface clock speed to 30 MHz if FX2LP18 is sourcing interface clock to GPIF/Slave FIFO interface.