Read data problems in synchronous dual-ports | Cypress Semiconductor
Support & Community
Read data problems in synchronous dual-ports
Why is the data read from a synchronous dual-port always the last word written even though the read address is different than the write address?
Many synchronous dual-port devices have an internal burst counter to facilitate block transfers to and from the device. Sometimes the control inputs for this circuitry are incorrectly connected. This may cause all accesses to be led to the same memory location, even though different external addresses are supplied. The address logic for such devices can be thought of as counters with synchronous parallel load. The internal counter should be in the load state to address the memory externally. Often times, the counter is in the reset or hold state. The result is all read and write operations access the same address. If the internal counter control signals are properly connected, the next thing to check is whether the problem is isolated to one port or both. Generally, if one port reads the data properly but the other one doesn't, then there is probably a misconnection somewhere on the bad port. This can be anything as simple as a single address trace being corrupted or the device is not properly loaded. Check all address and data lines carefully for correct connection.