PSoC Brown Out Detector | Cypress Semiconductor
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PSoC Brown Out Detector
Question: What will happen if brown out is detected? Can an interrupt be triggered on its detection?
Response: When the VDD drops below the IPOR threshold, the PSoC is automatically reset. But under circumstances where the IPOR threshold is not set correctly, this may lead to processor hanging. For example, when the PSoC is operated at 24MHz, the VDD has to be above 4.75V. The IPOR should be set to 4.8V for this condition. If IPOR is not set correctly, then the processor may hang if the voltage falls below 4.75V.
Under such circumstances, the LVD may be used to generate an interrupt when the supply falls below the LVD threshold. The LVD threshold can be set in the Global Resourses window in the PSoC Designer. The LVD interrupt can be enabled by setting the LVD bit in the INT_MSK0 register. The PSoC designer by default places a "halt" instruction in the LVD interrupt vector. This will safely halt the processor in case of a brownout. Alternately, you could write your own ISR to perform other operations like throttling down the CPU speed, storing critical variables to EEPROM etc.