POR setting based on CPU and Vdd | Cypress

Support & Community

POR setting based on CPU and Vdd

Last Updated: December 17, 2009
Answer: 

Question What is the default POR setting based on the CPU and Vdd settings. What are the valid POR levels based on these settings ?

Response The POR setting is set to default value in boot.asm based on the CPU and Vdd settings. The CPU speed has to be set based on the valid operating range for the particular chip. The valid operating range for CPU frequency Vs the Vdd is given in the Figure below

The default values based on the CPU and Vdd settings are highlighted in blue in the Tables below.The POR setting can be changed by setting the register VLT_CR register. But if any other POR setting is used other than the one that is automatically set by boot.asm, then care should be taken to see that the system will remain in the valid operating range. The valid settings for the POR and the default setting in boot.asm (highlighted in blue) are shown in the tables below.

Chips with Vdd setting from 5 V to 3.3 V

CPU

Valid POR Settings

 

4.65 V

4.4 V

2.9 V

24  (SysClk/1)

Valid

NA

NA

12  (SysClk/2)

Valid

Valid

Valid

6    (SysClk/4)

Valid

Valid

Valid

3    (SysClk/8)

Valid

Valid

Valid

1.5 (SysClk/16)

Valid

Valid

Valid

Lower

Valid

Valid

Valid

 

 

 

 

Chips with Vdd setting from 5 V to 2.4 V

CPU

Valid POR Settings

 

4.65 V

2.9 V

2.35 V

24  (SysClk/1)

Valid

NA

NA

12  (SysClk/2)

Valid

Valid

NA

6    (SysClk/4)

Valid

Valid

NA

3    (SysClk/8)

Valid

Valid

Valid

1.5 (SysClk/16)

Valid

Valid

Valid

Lower

Valid

Valid

Valid

 

Provide feedback on this article

To protect your privacy, do not include contact information in your feedback.

Browse KB By Product

Browse KB by Type