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PCB Layout Considerations for CY23020-3 | Cypress Semiconductor

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PCB Layout Considerations for CY23020-3

Last Updated: June 23, 2011

Are their any special PCB layout considerations that should be taken with the CY23020-3 component?


Good bypassing is important but because the device is producing differential outputs, it will tolerate more power and ground pin noise without causing an applicable increase in output jitter. Being a differential output device requires that the signal carrying PCB traces be kept both equal line length and correctly impedance matched to the device. Classically impedance matching resistors, placed as close to the source (driver) device are used. It is important that if these are used that the physical length from the driving pin to where the parallel differential transmission line trace pair starts be exactly equal. This will cause the propagating EM(Electro Magnetic) wave to travel along the transmission line in stem (copper trace point to physically adjacent trace point). Care should also be used to insure that there is minimal potential for inducing noise into the feedback path to reduce outside signal induced jitter in the device.

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