Overlay material for high ESD (>25KV) environment | Cypress Semiconductor
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Overlay material for high ESD (>25KV) environment
What overlay materials do you recommend for a high (>25KV) ESD environment. Are there other design techniques for this environment?
Kapton tape has a high dielectric strength (290kV/mm). Another option is placing a transient voltage suppression device (like ESD diodes) across the pins of the PSoC chip.