Low to High transition on the TX pin during Reset | Cypress Semiconductor
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Low to High transition on the TX pin during Reset
When using the UART (or TX8) user module, when the device gets reset, there is a Low to High transition on the TX pin. Why does this happen and what is the work around to avoid this transition?
At Reset, the drive mode of the TX pin is HighZ. During the boot process when the code from boot.asm is executed, the drive mode of the TX pin is first configured to Strong drve. Then it gets connected to the Global bus. When the UART is started in main.c the pin gets driven by the UART TX digital block and goes high. During the time between the drive mode configuration and the connection of the pin to the global bus, the pin is driven by the PRTxDR register whose default value is 0. This drives the pin to strong Low which causes the Low to High transition on the TX pin.
To avoid this, set the parameter "initial value" of the GPIO pin to 1. This will ensure that the value in PRTxDR register is 1 during startup, so that when the drive mode of the pin is changed to strong during the boot process, the pin will be driven with a High. This will prevent the Low to High transition (the pin will directly have a transition from High Z analog to strong 1).
To set the "InitialValue", just left click on the TX pin in the chip editor window or the pin out window and select initial value as 1 as shown below: