Invert the PS/2 SCLK and SDATA Pins in the CY7C63723 Design | Cypress Semiconductor
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Invert the PS/2 SCLK and SDATA Pins in the CY7C63723 Design
Is it possible to invert the PS/2 interface signals such as changing (12pin=SDATA & 13pin=SCLK) to (12pin=SCLK & 13pin=SDATA )?
Yes, there're a few places in the firmware that need some modifications. For example,
1- Change the definitions of CLKH_DATAH, CLKH_DATAL, CLKL_DATAH, CLKL_DATAL to match with Table 13.1 in the data sheet.
2- Change the values of SDATA and SCLK labels.
3- Change the send_0 and send_1 routines.