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Interrupt Priority Level in PSoC1 | Cypress Semiconductor

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Interrupt Priority Level in PSoC1

Last Updated: December 31, 2011

Is there any way to change the priority level of an interrupt? If a higher priority interrupt occurs while a lower priority interrupt is executing, will it be pre-empted?


No.  It is not possible to change the interrupt priority in PSoC.  The interrupt priorities are fixed as per the order of the Interrupt vectors in Boot.asm.  The Reset Vector has the highest priority followed by LVD, GPIO, Analog Coumns, Digital blocks and so on.  Details of the priority can be found in the Technical Reference Manual under the Interrupt Controller chapter. 

However, by proper placement of the modules, some amount of prioritization can be done.  For example, if you have a Counter and an UART and would like to have the UART to have a higher priority place the UART in DCB02 and DCB03 and the counter in DBB10 or below.  This will place the Counter's interrupt in a lower priority interrupt vector.

For more details, please refer to the Interrupt Controller chapter of the Technical Reference Manual of PSoC.

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