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FX3 UART Prints Garbage Data During JTAG Debugging - KBA86728 | Cypress Semiconductor

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FX3 UART Prints Garbage Data During JTAG Debugging - KBA86728

Last Updated: January 30, 2014

When debugging the FX3 firmware through a JTAG interface (as described in chapter 12 of the FX3 Programmers Manual), the UART sends out garbage data. However, it works correctly during normal firmware execution on the board (without JTAG debug). Why?


This is most likely due to an incorrect initialization command passed when setting up the debug environment in Eclipse. Refer to step 5 of the debugging procedure in the FX3 Programmers Manual. The default input clock frequency setting that is passed here is for 19.2 MHz (monitor memU32 0xE0052000 = 0x00080015).

If the input clock on your board is not 19.2 MHz and you copy and paste the above statement during debug init, the internal frequency multiplier does not correspond to the correct input clock frequency of the board; the UART values calculated internally by the APIs will be incorrect. Hence, the UART module always prints garbage data.

The solution is to pass the correct value, corresponding to the input clock frequency on your board.

For 19.2 MHz, monitor memU32 0xE0052000 = 0x00080015
For 26.0 MHz, monitor memU32 0xE0052000 = 0x00080010
For 38.4 MHz, monitor memU32 0xE0052000 = 0x00080115
For 52.0 MHz, monitor memU32 0xE0052000 = 0x00080110

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