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External SysClk | Cypress Semiconductor

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External SysClk

Last Updated: March 27, 2011

Can an external clock be used as SysClk for the PSoC?


Yes.  Apart from the Internal Main Oscillator and the External 32kHz crystal + PLL, the PSoC can be clocked using an externally generated clock signal. This clock signal must be in the range of 1MHz to 24 MHz and should be connected to P1[4].  When using the external SysClk, the drive mode of P1[4] should be set to High-Z (not High-Z analog).

The external SysClk is controlled by the EXTCLKEN bit in the OSC_CR2 register.  Setting this bit selects the clock source connected to P1[4] as SysClk.  On reset the EXTCLKEN bit is 0 and hence the device starts up with the internal IMO.  The devices switches to the external SysClk when the EXTCLKEN Bit is set inside the boot.asm file.  There is no way to start the system from a reset state with the external clock.

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