External Processor Connection to the Host with the CY7C68001 - EZ-USB SX2. | Cypress Semiconductor
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External Processor Connection to the Host with the CY7C68001 - EZ-USB SX2.
How does a processor tell that the SX2 is connected to a host? When the processor gets connected, an ENUMOK interrupt gets sent using an EEPROM to load the descriptor. Is it safe to assume that if a BUSACTIVITY interrupt is seen that the processor is disconnected, and that if an ENUMOK interrupt is received it is connected? Or is there a better way to do this?
For a self-powered device, the most efficient and robust way to determine whether the SX2 is connected or disconnected is for the external processor to sense the absence or presence of VBUS at the connector, via an I/O pin.
By sensing VBUS at the connector, the external master will also handle the back-voltage compliance aspect of a USB device (per the USB 2.0 spec). When the external master detects the presence of VBUS, it should set the DISCON bit to 0 in the IFCONFIG register. This will connect the SX2 to the USB bus. When the external master detects the absence of VBUS, it should set the DISCON bit to 1. This will disconnect the SX2 from the USB bus, and prevent the USB data lines from being driven. The external master's state machine must monitor VBUS at all times. Failure to do so will guarantee failure at a USB compliance test house or workshop.
Using the BUSACTIVITY and ENUMOK interrupts as an absolute indicator for USB cable connection is inefficient because they have dual meanings. The BUSACTIVITY interrupt will also get generated if the host puts the system into standby, and an IDLE ('J') state is asserted on the USB bus. The ENUMOK interrupt will also get asserted if the host issues a USB bus reset, thus forcing the SX2 to renumerate.