Design Considerations for Using PSoC in a Noisy Environment | Cypress Semiconductor
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Design Considerations for Using PSoC in a Noisy Environment
What should be the design considerations for using PSoC1 in Noisy environment ?
Consider the following design tips when using PSoC in a noisy environment such as near large DC motors:
-Stable supply voltage and ground are very important.
-You want an output impedance on SCLK (P1) and SDATA (P1). Noise on the SCLK signal can be perceived as a clock and place the part in test mode. We generally recommend you to connect 300 Ohms resistor on the P1 and P1 lines.
- Place a 10uF and a 0.1uF (ceramic) decoupling capacitors on the power supply to cover most frequencies of noise.
If you are using Capsense controllers, you can find more information on Design Considerations here: Getting Started with Capsense