Design Considerations for Using PSoC in a Noisy Environment | Cypress

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Design Considerations for Using PSoC in a Noisy Environment

Last Updated: March 26, 2011
Question: 

What should be the design considerations for using PSoC1 in Noisy environment ?

Answer: 

Consider the following design tips when using PSoC in a noisy environment such as near large DC motors:

-Stable supply voltage and ground are very important.
-You want an output impedance on SCLK (P1[1]) and SDATA (P1[0]). Noise on the SCLK signal can be perceived as a clock and place the part in test mode. We generally recommend you to connect 300 Ohms resistor on the P1[1] and P1[0] lines.
- Place a 10uF and a 0.1uF (ceramic) decoupling capacitors on the power supply to cover most frequencies of noise.

If you are using Capsense controllers, you can find more information on Design Considerations here: Getting Started with Capsense

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