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CY8C20X36A/46A/66A/96A: ISSUE WITH SHARING ISSP BUS | Cypress

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CY8C20X36A/46A/66A/96A: ISSUE WITH SHARING ISSP BUS

Last Updated: March 13, 2012
Question: 

Why CY8C20X36A/46A/66A/96A parts get heated up abnormally while in reset and when trying to program another PSoC chip on a shared ISSP bus?

Answer: 

While in reset (XRES held high), if key “AC52” is pushed to ISSP bus CY8C20X36A/46A/66A/96A parts will enter into device test mode. In this mode internal regulator of the chip will be disabled and the core of the controller will be powered at a higher voltage than spec’d, thus damaging the device.

Avoiding/Solving this problem requires avoiding CY8C20X36A/46A/66A/96A chip from seeing the “AC52” key in reset condition, which in turn is possible if ISSP lines of CY8C20X36A/46A/66A/96A are not shared.

Note: Cypress do not recommend sharing ISSP bus of CY8C20X36A/46A/66A/96A parts with other PSoC devices

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