CY7C68300 / CY7C68300A -- ATA_ENABLE Line | Cypress Semiconductor
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CY7C68300 / CY7C68300A -- ATA_ENABLE Line
Is it possible to use the ATA_ENABLE line to pause access to the ATA bus at any time - including during a data transfer?
The ISD-300 and the EZ-USB AT2 families both have the ATA_EN functionality although they do work slightly different. The ISD-300 will pause the ATA state machine when ATA_EN is disabled and tri-states the ATA bus. When you re-enable the ATA_EN, the bus comes out of tri-state and the ATA state machine starts up where it left off.
The AT2 is implemented differently in the fact that it is a polled pin. The polling interval is 20ms so there can be a slight delay from when ATA_EN is brought low until the bus is put into tri-state. By de-asserting ATA_EN you will also be dropped off of the USB bus so when ATA_EN is asserted the part will re-enumerate on the USB bus. You may want to set bit 0 of address 5 in the EEPROM of the AT2 to enable resets to the device when ATA_EN is re-asserted. Of course if a data transfer is taking place and ATA_EN is deasserted the transfer will fail and data corruption could take place, so this is definitely not recommended.
Please check our application notes section for information on bus sharing with Cypress Mass Storage Bridges.