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CY2308 configuration of S1 and S2 | Cypress Semiconductor

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CY2308 configuration of S1 and S2

Last Updated: June 18, 2011

If S2=1 and S1=0, then as per the datasheet, the output source is reference instead of PLL. What will the propagation delay be in this case?


When the CY2308 is configured with S2=1 and S1=0, the device will go into buffer mode. The input will travel through some circuitry and then to the output. The delay is on the order of 3ns - 8ns.

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