Clearing Counter/Timer/PWM Interrupt in PSoC 3/5 | Cypress Semiconductor
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Clearing Counter/Timer/PWM Interrupt in PSoC 3/5
How do I clear the interrupt caused by Counter/Timer/PWM component so that the next interrupt is processed by the CPU?
To clear interrupt caused by peripherals, inside the ISR code, read the status register of the peripheral causing the interrupt. This status read will clear the ‘interrupt request’ bit of the peripheral.
So for clearing the interrupts caused by counter, Counter_ReadStatusRegister API should be called inside the counter's ISR. This will clear the interrupt request enabling further interrupts.