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Can I program enCoRe III through the USB connector just like enCoRe II? | Cypress Semiconductor

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Can I program enCoRe III through the USB connector just like enCoRe II?

Last Updated: January 01, 2012

Can I program enCoRe III through the USB connector just like enCoRe II?


enCoRe III is different from enCoRe II in that the programming interface is not internally shared with the USB D+ and D- pins. Therefore you can not program through the USB interface natively.

However if your application can afford permanently tying up two I/O pins, then it is possible to connect the programming pins, ISSP-SDATA (P1.0) and ISSP-SCLK (P1.1), to the USB D+ and D- pins through 100 Ohm resistors.

An example schematic is attached that shows this interface. There is an important consideration to note before implementing this. In order to acquire the programming mode, enCoRe III pulls the SDATA pin high briefly, and then pulls it low for the duration that the programming window is open. Looking at the USB specification, the device incorporates a pull-up resistor in the D+ line to communicate to the PC that it is a full-speed device connecting to the bus (a low-speed device uses a pull-up on the D- line).

This leads to two points:

1) The decision was made to swap the connection of ISSP-SDATA and ISSP-SCLK to D+ and D- as compared to the low-speed enCoRe II device since the brief pull-up of SDATA would correlate with the D+ pull-up associated with a full speed device. The latest revision of the CY3655-PLG USB programming adapter (PDC-9241 Rev *A) includes jumpers allowing the lines to be swapped so that it can be used with either enCoRe II or enCoRe III to reprogram the device through the USB connector.

2) When using this configuration, the actual sequence when connecting an enCoRe III device to a USB host is that the host will see the D+ line go briefly high and then low due to the programming interface, and then return high when firmware later enables the actual D+ pull-up resistor to connect to the bus. It is theoretically possible that a host PC could interpret the initial D+ high state as an attempt to connect the full-speed USB device. It might try to communicate with the device, however the enCoRe III might not be executing firmware yet, and may not be in a position to respond, thus causing the host to terminate communication with the device.

USB hosts will typically allow some debounce interval for this signal to stabilize before making the device connection, and the speed determination is made after a bus reset condition. Each vendor should determine if the potential risk is acceptable to them before proceeding. In general Cypress recommends only using this for the development purposes to simplify reprogramming the device during this stage.

In production the 100 Ohm resistors can be Not Populated. As a final note, Cypress has evaluated the example board with respect to USB compliance and has noted no anomalies. Note that the board is a dongle form factor (USB standard-A plug integrated directly onto the PCB). Designs using a longer USB cable might wish to verify satisfactory USB compliance, although no problems are anticipated. Cypress has also evaluated the design with respect to suitable programming capability. No issues have been noted when programming with both the MiniProg and the ICE-Cube. One caution that should be observed is that if the design will use a long USB cable, then voltage drop across this cable should also be considered when programming.

For the enCoRe II device the ICE-Cube + ISSP cable is only recommended for dongle-style designs. It should not be used for products with a USB cable due the additional voltage drop. The same guidance should be applied to enCoRe III based designs.

File TitleLanguageFile SizeLast Updated
Download enCoRe III - WUSB LP Dongle Schematic Rev C.pdfEnglish67.26 KB12/19/08

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