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Burst Counter Wrap-Around | Cypress Semiconductor

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Burst Counter Wrap-Around

Last Updated: June 11, 2011

- What happens when I use the burst counter and reach the very last memory location?

- Does the internal counter return to 0 when I reach the end of the memory array?

- If the burst counter wraps around to 0, will I be able to continuously read the data on every clock cycle or do I have to pause my reading operations?


The burst counter feature is available on most synchronous dual-ports to allow easier design and interfacing to standard processors. The burst counter is an internal counter that can be incremented with a few simple control signals rather than having to provide a new address for every access when the access is sequential. The important signals are called /CNTEN = Counter Enable, /ADS = Address Strobe, and /CNTRST = Counter Reset. On each positive edge of the port's clock, the internal counter for that port will either load, increment or reset according to the current state of each of those three signals.

For most of the CY7C09xxx(V) dual-ports, the counter can address the entire memory array and will loop back to the start. In other words, if we are looking at the CY7C09099 128K x 8 synchronous dual-port, we can load the internal counter to initially begin with address 0x00000. We can increment this internal counter to step through the entire depth of the dual-port. When we get to the last memory location (address 0x1FFFF), the next "increment" operation will cause the internal counter to loop back to 0x00000. This loopback will occur without any pauses required. Operating in Flow-through or Pipelined mode, the burst counter is able to increment on every single clock cycle.

For the CY7C08xxV dual-ports that have the burst counter feature, there is also the additional feature of mask features which changes things just a little bit. If the mask register is not used, the burst counters work just like the counters described previously. The one difference is the addition of a Counter Interrupt (/CNTINT) signal that asserts when you reach the last memory location. If you do use the mask register, it sets the wrap around point for the burst counters. The mask register is loaded with a mask value that divides the internal address to a masked portion and unmasked portion. When the counter increments to the point where the unmasked portion is all 1's, /CNTINT is asserted and the next increment operation will reset the counter to the originally loaded value.

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