Built-In Selt-Test (BIST) and why should I use it? | Cypress Semiconductor
Support & Community
Built-In Selt-Test (BIST) and why should I use it?
What is Built-In Selt-Test (BIST) and why should I use it?
HOTLink Built-In Self-Test allows a clear and unambiguous check of the HOTLink Transmitter and Receiver, and the serial link connecting them. As part of an off-line diagnostic, this feature allows the user to ensure that the interconnect link is fully operational and that any other diagnostic failure indications are caused by system blocks above the physical layer.
BIST allows the HOTLink adapter card manufacturer to do a quick link-quality test (or node quality test with the use of the loop-back functionality of HOTLink) without the necessity of bringing up a fully functional system to do link testing. BIST is controlled by extra HOTLink data-enable inputs. Only a few connections and minimal external logic are necessary to add BIST to an otherwise complete system. (See the CY9266 Evaluation Board User's Guide). BIST status indications appear on the RP, RVS(Qj) and RDY* outputs which are easily monitored by logic internal or external to the data flow controller. In BIST mode, the HOTLink Transmitter generates a 29 - 1 (511 character) pseudo-random pattern using its Input register configured as a Linear Feedback Shift Register (LFSR). The HOTLink Receiver compares the serial BIST data stream with identical BIST patterns generated in its Output register. All of the logic in the transmitter (except the input pins) and all of the logic in the receiver (including the output pins and their attached loads) are checked by BIST. All of the serial link interconnect components are exercised with normal data patterns, which are checked character-by-character in real time and at full link operating speed.
HOTLink Transmitter/Receiver (Attached below 38-02017_0D_V)
CY9266 HOTLink Evaluation Board User's Guide (Attached below)