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Bit Addressability of GPIO Pins in PSoC® 3 - KBA88236 | Cypress Semiconductor

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Bit Addressability of GPIO Pins in PSoC® 3 - KBA88236

Last Updated: March 19, 2014

How do you address individual GPIO pins in PSoC® 3?


Similar to 8051 code, PSoC 3 offers the flexibility to address the port pins individually. Access a specific bit using the SFR(Special Function Register) register area. The Keil compiler provides the keyword “sbit,” which is used for bit access of the SFR. Note that the sbit can be used only for the SFR registers.

For example:

To access the pin PRT1.7, define the SFR bit as follows:

sbit bit_led=SFRPRT1DR^7; // This makes the PRT1.7 bit addressable

Now, the bit can be set or cleared using the following code.

bit_led = 1; // Set the bit
bit_led = 0; // Clear the bit

There is an alternate way of doing this using the SETB command. This is an assembly command so you will need to use an inline assembly method to include it:

#pragma asm
SETB bit_led ; Set the bit
CLRB bit_led ; Clear the bit
#pragma endasm

In order to make sure that the GPIO is controlled using the SFRs, set the SFRPRTxSEL register’s bit corresponding to the pin that is being accessed to one. In the foregoing case, bit 7 of SFRPRT1SEL would be set to one in order to access PRT1.7, as shown here:

SFRPRT1SEL |= 0x80; // This makes the PRT1.7 controllable through SFRs

Refer to the Knowledge Base Article “Using Assembly Language for PSoC 3 in PSoC Creator” for the settings required to enable inline assembly.

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