ADC Errors and Techniques to Compensate these Errors | Cypress Semiconductor
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ADC Errors and Techniques to Compensate these Errors
What are the offset and gain errors in PSoC ADCs? How do I reduce these errors and improve the accuracy of an ADC?
The actual offset and gain errors of PSoC ADCs depend on the type of ADC (Incremental ADC, Delta Sigma ADC, Single Slope ADC, SAR ADC etc) and the device (CY8C27x43, CY8C21x34 etc). For example, the offset and gain errors of a 12 bit incremental ADC in CY8C27443 device (ADCINC12 user module) are 9mV and 1.5% respectively. To know the actual error values of a particular ADC, refer to the respective ADC's user module data sheet under the Electrical Characteristics section.
The ADC's accuracy may be increased by performing offset and gain calibration.
Offset Calibration: There are two methods to do offset calibration.
1. Apply 0V input to the ADC. Measure the ADC count. This represents the offset error of the system. Store this in the Flash and subtract this value from actual measurements.
2. Correlated Double Sampling: In this method, the input to the ADC is shorted to GND and the output of the ADC is measured. Call this "Zero". Then the input to the ADC is shorted to the actual signal and the output of the ADC is measured. Call this "Signal". Subtract "Zero" from "Signal" to get the offset compensated value. This sequence is performed for every measurement. More details about this technique can be found in AN2226 - Correlated Double Sampling for Thermocouple Measurement.
Gain Calibration: To compensate for gain error, apply a known voltage to the ADC. Measure the ADC counts. Calculate the ratio of Input Voltage / ADC Counts. Store this value as the scale factor. During normal measurement, multiply the ADC Counts by the scale factor to get the gain compensated value.
Combining the offset and gain calibrations, the accuracy of the ADC can be improve to as good as 0.5% or less.