3.3V input clock into the CY23EP05 or CY23EP09 operating at 2.5V | Cypress Semiconductor
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3.3V input clock into the CY23EP05 or CY23EP09 operating at 2.5V
When operating the CY23EP05 or CY23EP09 at 2.5V, can I drive it with a 3.3V input clock?
The datasheet specifies a maximum input voltage, VIH, of VDD + 0.3V. This specification reflects the fact that there is a VDD clamp diode on the input. This diode turns on at VDD + 0.7V. The reason for the VIH maximum spec is to avoid harmful input current, not because of voltage stress.
One possible solution is to use a two-resistor voltage divider to reduce the swing of the input clock from 3.3V to 2.5V. An example is 1k ohms in series to the CY23EP05/09 input, then 3.3k ohms from the input to ground.
Evaluating the situation more closely, we find that only a single resistor is required. By placing a 1k ohm resistor in series, very close to the CY23EP05/09 input, it will limit the input current to safe ~ 0.4 mA when the input reaches 1V above the 2.5V supply voltage. The resistor must be placed close to the input in order to avoid signal integrity issues due to impedance discontinuities.