Slave FIFO write is not working for Superspeed cypress chip | Cypress Semiconductor
Slave FIFO write is not working for Superspeed cypress chip
I am using the Slave FIFO(32-bit @100MHz) files from application note. Read from FX3 is working as expected.
Write to FX3 is not working. The status of signals during write operation is SLWR_N = 0, SLOE_N = 1, SLRD_N = 1, PKTEND_N = 1 for exactly 256 cycles(Status of all the signals confirmed through Logic-analyzer). I can see the FLAGA status going to zero after finishing write operation. It is not releasing the second buffer and BULKIN operation in control-center application failed. Until I reset the device or end-point FLAGA is not going high. I cannot find any clue.
Another interesting case is If i perform short packet write with 64 or less bytes write operation is successful. I can even see the same data after BULKIN operation in control-center.
No slack issues found in timing check. Can anybody help regarding this?