Slave FIFO | Cypress Semiconductor
I've been using slave.hex firmware for my FX2LP and the Stream Out Verilog code for the FPGA.
The situation is that, everytime I Transfer data Out / Transfer File Out it always shows the error bulkout endpoint 997.
How can I fix this?
Also I think there's a bug on slave.hex firmware.
Can Anyone help on how to fix this problem?
P.S " I am using Spartan 3E , which will receive all data coming from the FX2LP" Is there any Update about this topic? On how to send data/stream data or Image file and how configure the Spartan 3E with FX2LP.
I've been reading all the application notes and all didn't work so well, If anyone know how to make it please tell me I really need your help :(
Add me on skype now: christian199599
or post your skype contact, Please i really need your help guys.