QUERY : Slave Asynchronous SRAM for FX3 GPIF | Cypress Semiconductor
QUERY : Slave Asynchronous SRAM for FX3 GPIF
we have just started to use the Cypress FX3 and its a great device to work with.
we know that the Slave FIFO mode of GPIF-II is a very popular configuration. however, we are interested in the Slave Async SRAM configuration.
- there are only 2 lines about Slave Async SRAM configuration of GPIF-II. where can i find more information on this?
- what does it mean that Slave Async SRAM config allows Master Processor to access FX3 Config Registers and Buffers?
- it also says that Slave FIFO mode does not allow Master access to FX3 Config Registers and Buffers. what does this mean?
the Slave Async SRAM config is interesting because Master Processor can directly write Data to FX3 Buffers for pumping out to USB. this is great with no added DMA overhead in the FX3.
this appears like the Hitachi HD6309, the "super" Motorola MC6809. no need to keep "secret super features" a secret.
thank you in advance.
have a fine day,