MCLK from CX3 Mipi header | Cypress Semiconductor
MCLK from CX3 Mipi header
I am trying to get MCLK from CX3's MIPI header to drive the sensor. I have my PLL_CLK at some x MHz and I am setting the mclk dividers as 0x00, /* mclkCtl */ ,CY_U3P_CSI_PLL_CLK_DIV_2, /* mClkRefDiv */. and use the CyU3PMipicsiCfg_t structure to configure the MIPI bridge. I am not getting any clk output from the pin in MIPI header.
Is the above step enough for producing MCLK or do I need to do anything else ?