DMA controller overrun | Cypress Semiconductor
DMA controller overrun
Does someone know what is the meaning of PIB error: CYU3P_PIB_ERR_THR0_ADAP_OVERRUN. Only note I found about it is from the source code (cyu3pib.h):
DMA controller overrun on a write to one of the Thread 0 sockets. This typically happens if the DMA controller cannot keep up with the incoming data rate.
It is different than the more common error: CYU3P_PIB_ERR_THR0_WR_OVERRUN, which means writing to a full buffer.
Thread0 in the PIB deals with an auto DMA channel between the host and the GPIF-II. I get this error seldom. Is there anything I can do about it?