CY7C65215 using SPI Master with 9-bit data width | Cypress Semiconductor
CY7C65215 using SPI Master with 9-bit data width
I have a SPI slave device that expects 9-bit values (8 data bits with an extra odd-parity bit). I've tried setting the SPI data width to 9 bits, but I don't know how to pack the data into the sending buffer. The only examples use 8-bit data widths, which works fine.
What is the expectation when using data widths that are not multiples of 8 bits?
Am I expected to pack the bits into the buffer? If so, how is this different from using a data width of 8?