Using high-bandwidth ISO endpoint without GPIF | Cypress Semiconductor
Using high-bandwidth ISO endpoint without GPIF
I am designing an application using CY7C68013A that must support high-bandwidth isochronous OUT transfers. Data should be moved out of CY7C68013A to a FPGA. I have implemented device descriptors, the host recognizes the CY7C68013A and loads driver (USB audio), and when I run an application on host (audio player), it seems to send out the data just. The interface between CY7C68013A and FPGA is still TBD, so on this early stage I just want to make sure that the correct data arrives to endpoint. Can someone post a minimalistic example of how I setup the registers, and check the arrived data packets and then discard them?