Some register questions about cy7c68013A speed | Cypress Semiconductor
Some register questions about cy7c68013A speed
I ultize cy7c68013a chip to fullfil a bulk transfer.I have configured EP2 as OUT endpoint,bulk,quad buffer(4*);ep6 as IN endpoint,bulk,quad buffer(4*),but now I have confronted a data losing problem.I want to know what registers are related to the transfer speed(or packetsize).
Otherwise,I have read some references and was confused by following packet-related concepts:maxPacketSize,EPxBCL/H,AUTO2/4/6/8INLENGTHL/H.
Thank you for your reply!