Questions about AN61345 - Designing with EZ-USB FX2LP™ Slave FIFO Interface using FPGA | Cypress Semiconductor
Questions about AN61345 - Designing with EZ-USB FX2LP™ Slave FIFO Interface using FPGA
I have just read the AN61345 by Rama Sai Krishna V, which explains and provides examples for a complete configuration of a Host + FX2LP + FPGA system. I saw in the Document History that there used to be a version with details about the Virtex5.
I am currently trying to develop a system like the one described in that application note on a Avnet Virtex5 board, and was wondering if that version of the document is still available.
Thank you so much.