How to make a simple GPIF setup | Cypress Semiconductor
How to make a simple GPIF setup
We have a setup with a cmos sensor connected to the FX2 (CY7C68013A-56-LFX).
We have made the following connections:
Image sensor Data FIFO data
Image sensor Frame_valid RDY1
Image sensor line_valid RDY2
Image sensor pixel clk IFClk
What we want to do should be simple:
If both line_valid and frame_valid (RDY1 and RDY2) are high pixel data should be clocked into endpoint 6.
No flow control has to be implemented as the image sensor does not support flow control.
Now we have been looking at the GPIF documentation. Here we can see that it can do millions of things. But we did not manage to find out how to make such a simple setup.
Also I took a look at the GPIF editor. There are either some things missing, or I did not manage to find them.
What I think that needs to be done by the GPIF is following:
1. use RDY1 and RDY2 to gate the /SLRD
2. somehow disconnect the FifoAddr1 and FifoAddr0 and set them by software to point to the FIFO for endpoint6
I did not find out how to do this through the GPIF editor or directly by setting the registers.
Can somebody help me get started with this?