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GPIF : extra active edges on strobe ??? | Cypress Semiconductor

GPIF : extra active edges on strobe ???

Summary: 0 Replies, Latest post by jsteele on 13 Jul 2009 02:04 PM PDT
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In AN4051 (Doc No. 001-15284) about the GPIF Flow State feature for

UDMA, there is a strange (to me) quote on page 4 :

"It should be noted that in the case where MSTB is a CTL pin, the

GPIF will produce at most one extra active edge on MSTB in response to

a not ready indication from the slave."

So am I interpreting this correctly : if the GPIF is in a flow state

and reading data from an external slave, and the slave says "no data

available", then the GPIF *might* (or might not) go ahead and read the

data anyway ?

If this is the case, how does one deal with this situation ? In my

case, I'm reading from a FIFO inside an FPGA, so I can configure it to

have an "almost empty" flag in addition to an "empty flag". It would

seem that the logic would be to pass the FX2 a signal like :

RDY0 = (almost_empty) OR (empty),

and have the flowstate use RDY0 to throttle the data. In principle

this should transfer all but the final word from the FIFO. ("almost

empty" means there is one word remaining.) That, I suppose, could be

read from the FIFO by a normal (i.e., not flow-) state of the GPIF.

Is this the right approach ?

Unfortunately, I gave it a shot and it's not quite working yet.

Before pouring too much effort into it, I'd like to know if there's an

easier way...

BTW, I am basically just using the GPIF Primer example that

writes/reads to an external FIFO. I got rid of the OUT EP and the

write, and instead pipe external video data into the FIFO in the

FPGA. For the flow state logic I use

func = (FifoFlag) OR (empty),

if (func == 0) assert RE#, clock data

if (func == 1) de-assert RE#

where "FifoFlag" is the FX2's FULL flag for the IN EP, and "empty" is

the fpga FIFO empty flag.


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