FX2LP: Slave FIFO gives alternating data values instead of expected data | Cypress Semiconductor
FX2LP: Slave FIFO gives alternating data values instead of expected data
I am using the Slave FIFO to do bulk transfers from the host to an FPGA. When I send a packet from the host I am able to read the expected number of bytes from the Slave FIFO. However instead of the expected data I get an alternating sequence of bytes. Further, there are 2 sequences, which alternate with each packet sent.
And so on.
The endpoint is double buffered, so maybe it switches between sequences when the buffer changes?
I verified with a USB analyzer that the packet sent to the FX2LP is correct.
Any ideas why I get these symptoms?