Default Levels CTL0-5 | Cypress Semiconductor
Default Levels CTL0-5
It looks like this forum doesn't have a lot of activity. Hopefully someone can answer a simple question.
I'm a bit confused about the default levels of the CTL output lines used by GPIF. Looking at the data sheet, it appears they default to 1 and this is controlled with the GPIFIDLECTL register. However, the only code example I could find that referenced this register had comments that looked more like it was talking about FLOWEG0CTL or FLOWEG1CTL.
If I wanted the CTL lines all == 0 when not in use, would I write 0x00 to GPIFIDLECTL at initialization?