CY7C68013A (FX2LP) isochronous IN transfer problem | Cypress Semiconductor
CY7C68013A (FX2LP) isochronous IN transfer problem
We have a device that uses a CY7C68013A chip to transfer video data. It is configured to perform isochronous transfers at 3x 1024 bytes per microframe, using endpoint 2 with quad-buffered 1024 byte FIFOs. Streaming video can have a varying data rate, though, so not every transfer is filled up. It is said that the FX2LP can automatically send zero-length packets when necessary, but in practice transfers shorter than 2048 bytes are improperly transmitted, causing the transaction error bit to be set by the host USB controller. This happens whether we use externally generated data fed into the FIFOs or manually generate data and commit packets with the firmware. Is there anything special one has to do to commit short transfers? Do we have to set anything to enable automatic zero-length packets? Thanks.