FPGA interface to CY7C67200 - Can't get proper hardware revision | Cypress Semiconductor
FPGA interface to CY7C67200 - Can't get proper hardware revision
Hi. I'm using the DE2-115 FPGA. I'm trying to write my own firmware for the CY7C67200. I finished writing for the ISP1362 and then TerAsic changed the darn chip.
I'm having difficulty reading default values. I am trying to read the hardware revision at 0xC004. It should be 0x0101 + the number of revisions. I believe the chip is revision A, so that would be +0, correctl? When I read the value, I get 0xC008.
Does it matter if the address changes with Chip Select? Is there an FPGA example on this anywhere? I'm having difficulty understanding the difference between the address states (address, data, mailbox, status).
Any help would be greatly appreciated. I've been reading the documents from CY3663, but nothing seems to give me confidence that I'm doing it correctly.