Using GPIO pins reserved for Slave FIFO | Cypress Semiconductor
Using GPIO pins reserved for Slave FIFO
I would like to use a 32 bit wide synchronous slave FIFO interface with my FX3 circuit. This reserves a large number of pins.
Before the slave FIFO interface is put into operation, I would like to borrow two or three of these pins (marked GPIO) in order to have enough pins to configure my FPGA. Can I temporarily configure these pins as Simple IO, on the fly even after the GPIO-2 configuration data has been loaded? Or does the GPIO-2 configuration data override?