SPI MOSI pulled low | Cypress Semiconductor
SPI MOSI pulled low
I'm trying to access the SPI block without using the Cypress functions. I have clk, ssn and mosi working properly. But the miso line is pulled low as soon as I set the GCTL_IOMATRIX register to either GPIO+SPI or UART+SPI+I2S. I'm not sure what I'm not doing. Do I have to explicitly set that pin as an Input in it's GPIO_SIMPLE register or something?
Any help on the sequence needed to bring up the SPI block would be appreciated. I haven't found any examples that include the register accesses. If you know of any please let me know.