SPI with CY_U3P_SPI_SSN_CTRL_FW = 0 cuts off the serial clock? | Cypress Semiconductor
SPI with CY_U3P_SPI_SSN_CTRL_FW = 0 cuts off the serial clock?
Hi, I'm wondering if I set CY_U3P_SPI_SSN_CTRL_FW to 0 does the serial clock is cutted off during no SPI communication ?
I don't see how otherwise I could guarantee SSN to work properly and with the right timing.
what does it means "The SPI controller supports four modes of SPI communication with Start-Stop clock." Is there any way to stop the SPI_SCK outside the SSN assertion?