SPI communication during video stream transfer | Cypress Semiconductor
SPI communication during video stream transfer
i'm using FX3 and the AN75779 example in order to manage a couple of video sensors and to sample analog signals @32KHz using an AD converter connected to the SPI port.
I'm developing this project on CYUSB3KIT-003 board and an APTINA sensor.
Every around 30 microseconds FX3 detects the EOC syncing a MISO falling edge when SCLK doesn't run, then it writes 4 bytes to the ADC and after reads 3 bytes from it. The 4 written bytes change with each sample.
I connected MISO to GPIO45 pin on J7 socket and FX3 polls continously this pin waiting for EOC.
Several issues on this task.
I'm not using yet DMA for SPI transfer: is it possible to sync DMA byte TX & RX on the MISO falling edge, as an external inerrrupt? Maybe using external hardware in order to clean the MISO transactions due to the data transfer. Or better cleaning other pending interrupt requests to SPI DMA?
Moreover, after the detection of the EOC, may the DMA read seven bytes from a TX data buffer and in the same time write seven bytes to a RX data buffer, and then call a callback function?
I created a thread that manages the SPI communication with 8 as priority level, but i noted a great jitter (tens of milliseconds: it seems the transmission of the sensor line data) when the PC host requires the video stream from FX3: how can I avoid this jitter and guarantee the detection of an EOC every 30 microseconds and the execution of the callback?
Connecting MISO and GPIO45, the input signal coming from the ADC greatly reduces itself so i had to put an hardware buffer between MISO and GPIO45 pins. It is possible to avoid this external buffer?