small break time between DMA buffer switching of a certain thread | Cypress Semiconductor
small break time between DMA buffer switching of a certain thread
Cypress doc says that there's a small break time when a certain thread switches its DMA buffer (not switching socket of the thread, but switching to next DMA buffer of the socket), how long is that time roughly? less than 1us or several micro-seconds or more?
Seems this is a difference from the FX2 chip, for FX2, there's no break time when crossing the USB FIFO buffer (e.g. for 4x 512bytes FIFO)...understood that FX3 needs more complicated design (DMA involved), but is there any idea about this breaking time?