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slfifosync SDK example question | Cypress Semiconductor

slfifosync SDK example question

Summary: 3 Replies, Latest post by aasi on 27 Jul 2011 01:51 PM PDT
Verified Answers: 1
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gd_net's picture
20 posts


i want to use the slfifosync SDK example with 8bit parallel data bus width.

Do I have to configurate something inside the source code for this?

Best regards


mrao's picture
Cypress Employee
5 posts

Hi g,

Please do the following,

1. In cyfxslfifogpifdscr.c file change the following line from

     {CY_U3P_PIB_GPIF_BUS_CONFIG_ADDRESS  , 0x000018a7},



This changes the GPIFII configuration Data bus width setting.


2. The address pins A[0] and  A[1] need to be connected to GPIO[8] and GPIO[9] instead of GPIO[28] and GPIO[29].



Manish Rao

Chris R.'s picture
143 posts

Is it also possible to run the Slave FIFO interface in 32 bit mode?

aasi's picture
Cypress Employee
1166 posts

Hi Chris,

Yep. The 32 bit Slave FIFO support is being worked on. It will be incorporated in the next version of the SDK.




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