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slaveFIFO write,data repeat received | Cypress Semiconductor

slaveFIFO write,data repeat received

Summary: 1 Reply, Latest post by aasi on 12 Apr 2012 05:45 AM PDT
Verified Answers: 0
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tickyy's picture
7 posts

I made a slavefifo project.Using FPGA write data into the FX3.But when I run the project sometime.The data received have some error.Some data repeat received.

The data FPGA wrote into the FX3 is auto add one once a time.For exampl,the data is 1,2,3,4,5.. and so on.

But sometimes PC received  data is 1,2,3,4,5,2,3,6,7.The data 2,3 is receive twice.But I just write into the FX3 once.

So,I want to know what operation result in this.The problem don't always exist.It just sometimes and when I run more than 5 or 6 minute.

aasi's picture
Cypress Employee
1166 posts


What is the width of data bus?

Are these repetitions occuring nearby (i.e. like your example after 2 bytes) or there is randomness?



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