slavefifo 16bit data width | Cypress Semiconductor
slavefifo 16bit data width
To interfacing with external device, I'm trying to test using CYUSB3014.
I configured GPIF to slavefifo, and I checked operation correctly in case of 8 bit data width mode.
I tried to slavefifo 16 bit mode for increasing throughput.
But it is not working correctly.
Output data is Ok only DQ[7:0]. DQ[15:8] is always zero.
I guess, it is not losing even byte data.
Only 8 bit data is output.
For example, If I sent 0x12345678 data, then the following data is output each clock.
0x0078 0x0056 0x0034 0x0012.
The changes to the 16 bit mode are as follows :
* BUS_WIDTH : 0 --> 1
* ADR_CTRL : 0 --> 5
This was a reference to GPIF II designer example. (sync_slave_fifo_2bit.cydsn)