Slave FIFO Problems | Cypress Semiconductor
Slave FIFO Problems
I am trying to use the slave FIFO example with a Super Speed Explorer Kit and a Spartan 6 FPGA (Papillio Pro). It works as expected, but there is one big problem: When doing IN transfers (setting the FPGA in IN Stream mode using the dipswitchs) fast after eachother (for example by using streamer.exe), the endpoint stalls. Only resetting the pipe will fix this issue. (but it occurs again if you do a lot of transfers). Writing to the USB works great, up to 300 MByte/s. But that's not what I need.